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type ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g opti mos ? 3 power-transistor features ? fast switching mosfet for smps ? optimized technology for dc/dc converters ? qualified according to jedec 1) for target applications ? n-channel, logic level ? excellent gate charge x r ds(on) product (fom) ? very low on-resistance r ds(on) ? avalanche rated ? pb-free plating; rohs compliant maximum ratings, at t j =25 c, unless otherwise specified parameter symbol conditions unit continuous drain current i d v gs =10 v, t c =25 c 50 a v gs =10 v, t c =100 c 50 v gs =4.5 v, t c =25 c 50 v gs =4.5 v, t c =100 c 50 pulsed drain current 2) i d,pulse t c =25 c 350 avalanche current, single pulse 3) i as t c =25 c 50 avalanche energy, single pulse e as i d =35 a, r gs =25 ? 60 mj reverse diode d v /d t d v /d t i d =50 a, v ds =24 v, d i /d t =200 a/s, t j,max =175 c 6 kv/s gate source voltage v gs 20 v value 1) j-std20 and jesd22 v ds 30 v r ds(on),max 5 m ? i d 50 a product summary type ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g package pg-to252-3-11 pg-to252-3-23 pg-to251-3-11 pg-to251-3-21 marking 050n03l 050n03l 050n03l 050n03l rev. 1.02 page 1 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g maximum ratings, at t j =25 c, unless otherwise specified parameter symbol conditions unit power dissipation p tot t c =25 c 68 w operating and storage temperature t j , t stg -55 ... 175 c iec climatic category; din iec 68-1 55/175/56 parameter symbol conditions unit min. typ. max. thermal characteristics thermal resistance, junction - case r thjc - - 2.2 k/w smd version, device on pcb r thja minimal footprint - - 75 6 cm2 cooling area 4) --50 electrical characteristics, at t j =25 c, unless otherwise specified static characteristics drain-source breakdown voltage v (br)dss v gs =0 v, i d =1 ma 30 - - v gate threshold voltage v gs(th) v ds = v gs , i d =250 a 1 - 2.2 zero gate voltage drain current i dss v ds =30 v, v gs =0 v, t j =25 c - 0.1 1 a v ds =30 v, v gs =0 v, t j =125 c - 10 100 gate-source leakage current i gss v gs =20 v, v ds =0 v - 10 100 na r ds(on) v gs =4.5 v, i d =30 a - 5.8 7.3 m ? v gs =10 v, i d =30 a - 4.2 5 gate resistance r g - 1.5 - ? transconductance g fs | v ds |>2| i d | r ds(on)max , i d =30 a 38 77 - s value values 2) see figure 3 for more detailed information drain-source on-state resistance 5) 4) device on 40 mm x 40 mm x 1.5 mm epoxy pcb fr4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. pcb is vertical in still air. 5) measured from drain tab to source pin 3) see figure 13 for more detailed information rev. 1.02 page 2 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g parameter symbol conditions unit min. typ. max. dynamic characteristics input capacitance c iss - 2400 3200 pf output capacitance c oss - 920 1200 reverse transfer capacitance c rss -49- turn-on delay time t d(on) - 6.7 - ns rise time t r -13- turn-off delay time t d(off) -25- fall time t f - 3.8 - gate char g e characteristics 6) gate to source charge q gs - 7.4 - nc gate charge at threshold q g(th) - 3.8 - gate to drain charge q gd - 3.5 - switching charge q sw - 7.1 - gate charge total q g -1520 gate plateau voltage v plateau - 3.1 - v gate charge total q g v dd =15 v, i d =30 a, v gs =0 to 10 v -31- gate charge total, sync. fet q g(sync) v ds =0.1 v, v gs =0 to 4.5 v -1317nc output charge q oss v dd =15 v, v gs =0 v -24- reverse diode diode continuous forward current i s - - 50 a diode pulse current i s,pulse - - 350 diode forward voltage v sd v gs =0 v, i f =30 a, t j =25 c - 0.86 1.1 v reverse recovery charge q rr v r =15 v, i f = i s , d i f /d t =400 a/s - - 15 nc 6) see figure 16 for gate charge parameter definition t c =25 c values v gs =0 v, v ds =15 v, f =1 mhz v dd =15 v, v gs =10 v, i d =30 a, r g =1.6 ? v dd =15 v, i d =30 a, v gs =0 to 4.5 v rev. 1.02 page 3 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g 1 power dissipation 2 drain current p tot =f( t c ) i d =f( t c ); v gs 10 v 3 safe operating area 4 max. transient thermal impedance i d =f( v ds ); t c =25 c; d =0 z thjc =f( t p ) parameter: t p parameter: d = t p / t 1 s 10 s 100 s 1 ms 10 ms dc 10 2 10 1 10 0 10 -1 10 3 10 2 10 1 10 0 10 -1 v ds [v] i d [a] limited by on-state resistance single pulse 0.01 0.02 0.05 0.1 0.2 0.5 10 0 10 -1 10 -2 10 -3 10 -4 10 -5 10 -6 0.01 0.1 1 10 0000001 t p [s] z thjc [k/w] 0 10 20 30 40 50 60 70 0 50 100 150 200 t c [c] p tot [w] 0 10 20 30 40 50 60 0 50 100 150 200 t c [c] i d [a] rev. 1.02 page 4 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g 5 typ. output characteristics 6 typ. drain-source on resistance i d =f( v ds ); t j =25 c r ds(on) =f( i d ); t j =25 c parameter: v gs parameter: v gs 7 typ. transfer characteristics 8 typ. forward transconductance i d =f( v gs ); | v ds |>2| i d | r ds(on)max g fs =f( i d ); t j =25 c parameter: t j 3.2 v 3.5 v 4 v 4.5 v 5 v 10 v 11.5 v 0 3 6 9 12 15 0 20406080100 i d [a] r ds(on) [m ? ] 25 c 175 c 0 30 60 90 120 150 012345 v gs [v] i d [a] 0 30 60 90 120 150 0 20406080100 i d [a] g fs [s] 2.8 v 3 v 3.2 v 3.5 v 4 v 4.5 v 5 v 10 v 0 30 60 90 120 150 0123 v ds [v] i d [a] rev. 1.02 page 5 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g 9 drain-source on-state resistance 10 typ. gate threshold voltage r ds(on) =f( t j ); i d =30 a; v gs =10 v v gs(th) =f( t j ); v gs = v ds ; i d =250 a 11 typ. capacitances 12 forward characteristics of reverse diode c =f( v ds ); v gs =0 v; f =1 mhz i f =f( v sd ) parameter: t j typ 98 % 0 2 4 6 8 10 -60 -20 20 60 100 140 180 t j [c] r ds(on) [m ? ] 0 0.5 1 1.5 2 2.5 -60 -20 20 60 100 140 180 t j [c] v gs(th) [v] ciss coss crss 10 4 10 3 10 2 10 1 0102030 v ds [v] c [pf] 25 c 175 c 25 c, 98% 175 c, 98% 10 3 10 2 10 1 10 0 0 0.5 1 1.5 2 v sd [v] i f [a] z rev. 1.02 page 6 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g 13 avalanche characteristics 14 typ. gate charge i as =f( t av ); r gs =25 ? v gs =f( q gate ); i d =30 a pulsed parameter: t j(start) parameter: v dd 15 drain-source breakdown voltage 16 gate charge waveforms v br(dss) =f( t j ); i d =1 ma 20 22 24 26 28 30 32 34 -60 -20 20 60 100 140 180 t j [c] v br(dss) [v] v gs q gate v gs(th) q g(th) q gs q gd q sw q g 25 c 100 c 150 c 10 3 10 2 10 1 10 0 10 -1 1 10 100 t av [s] i av [a] 6 v 15 v 24 v 0 2 4 6 8 10 12 0 5 10 15 20 25 30 35 40 q gate [nc] v gs [v] rev. 1.02 page 7 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g package outline pg-to252-3-11 rev. 1.02 page 8 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g package outline pg-to252-3-23 pg-to251-3-11: outline pg-to251-3-21: outline rev. 1.02 page 9 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g package outline pg-to251-3-11 pg-to251-3-11: outline pg-to251-3-21: outline rev. 1.02 page 10 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g package outline pg-to251-3-21 pg-to251-3-11: outline pg-to251-3-21: outline rev. 1.02 page 11 2008-04-15 www..net
ipd050n03l g IPF050N03L g ips050n03l g ipu050n03l g published by infineon technologies ag 81726 munich, germany ? 2008 infineon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office (www.infineon.com). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies components may be used in life-support devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. rev. 1.02 page 12 2008-04-15 www..net

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